- RF Testing for the powercast kit.
- Debugging of low level code for future modules.
- pcb repairs.
Implementation of an FPGA into an ASIC
Goal: To be a core VLSI Design,Test and Verification Engineer Professional Experience: Chip Design tools- Cadence, Virtuso layout Editor,DRC,LVS, NC-Verilog. HDLs: VHDL and Verilog HVLs: VHDL, Verification with 'e' Embedded programming. Simulation tools - Modelsim Altera, Quartus, Xilinx. Atalanta: ATPG for Combinational and Sequential Circuits and Tetramax. •Software : C, Perl
- Hardware Engineering, VLSI , ASIC design.