Nov 2013 - Feb 2015
Jan 2011 - Nov 2013
Senior Principal Engineer
Jan 2009 - Dec 2010
Director of Product Development
Product development for Failure Analysis market, development of partnership with Agilent and Metrics s/w to market solution oriented products.
- Conceptualized and developed a line of high performance switch matrices for Agilent to market for testing and screening of packaged devices for the Failure Analysis market.
- Partnered with software development company to tap into existing customer base & gain s/w control of matrix.
- Developed wafer level interface for the switch matrix for test and screening on wafer, partnered with high temperature probe card manufacturer.
- Managed all Production, testing, and procurement activities.
2005 - 2009
Director of Product Development
Managed a multidisciplinary team of engineers and consultants to develop systems for long term, high temperature and high stress testing of semiconductor devices.Traveled to customer sites, implemented market feedback, and provided technical arguments to finalize sales. Monitored projects' progress to ensure project deadlines were met, resolved technical issues, and coordinated project logistics. Corresponded with company’s global field and applications associates to discuss current issues and resolutions. Negotiated partnership for leveraged marketing of product lines. Road map preparation, product proposals, data analysis and presentation, customer relations and support, vendor relations and management.Prepared progress reports to present milestone achievements to management. Formulated budget forecasts and continuously searched for uses of alternative technologies and strategies for cutting budget expenses.
- Successfully developed and launched 2 products in 2 years. Defined and implemented user driven GUI for all company products.
- Conceptualized and patented air cooled rail system and vertical design of probe cards for a manual multi-landing high-temperature (300C) wafer probing station for long term reliability testing.
- Designed and patented novel low current leakage switch multiplexer, which requires 40% of Reed relays required in conventional grid array matrix systems.
- Developed high temperature packaging and high temperature wafer level probing technologies.
- Defined an ARM9 microcontroller-based control board with GPIB, RS232, USB, and Ethernet; hired consultant to implement design and managed 4 consultants for hardware and software development.
- Led characterization effort for Desk Top Parametric Tester (DSPT), provided recommendations and oversaw implementation that drastically improved performance of DSPT system and moved it ahead a whole generation.
- Defined User interface and oversaw software development of the Desk Top Parametric Tester.
- Successfully finalized sales and formed partnerships during trade show demonstrations, which showcased capabilities of company's systems. Personally executed trade show displays that consisted of distributing technical literature and collecting user-supplied information on improving products and conducting competitive analysis.
2002 - 2004
Senior R&D Engineer
Managed procurement, test equipment setup and automation, and all characterization for Thin Film Transistor devices on flexible substrate and photovoltaic programs. Developed methods for silicon nanowire orientation and placement on substrate for device development. Procured and set up fully automated, wafer-level parametric test system for high throughput testing. Created AFM, SEM, and optical micrographs for identification of features and correlation with electrical data. Interacted with Material Scientists for synthesis and growth of Vapor Liquid Solid phase Si nanowires, and with the modeling group for analysis and interpretation of the electrical and electro-optical behavior of TFT and solar cell devices. Participated in process steps for the manufacture of the TFT device; Metal evaporation, Photo-resist pattern and developing, Plasma clean, HF vapor etch, metal lift off.Developed all software routines for automation.Set up clean room and facilities.
- Managed all test and characterization of company projects, procurement and setup of test equipment, and helped setup clean room and facilities
- Designed and implemented fully automated, 3 axis stepper drive, optical setup for solar cell characterization, data mining and analysis.
- Developed methods for wire orientation and placement on substrate for device development; also created methods for device development and patent publication.
- Worked on technique for surface potential characterization using AFM.
- Packaged and bonded devices for in Package test
- Data analysis and presentation, software development for automation and data extraction.
- Screened, packaged, characterized and modeled 200 MHz Si nanowire oscillator devices.
- Worked on several techniques to perform voltage contrast measurements with SEM and AFM.
2000 - 2002
Senior Test Engineer
Hired into newly established Telecom division to develop an external cavity laser for optical switches and routers.Managed development and characterization of stepper motor drive train, and all electrical and electromechanical components within the system, including interconnect technology with reliability design considerations for 25 year lifetime.Standardized test and characterization of laser cavity drive train and built test stations for production.
- Designed test apparatus for the stepper drive train characterization effort.
- Designed a zero out gassing optical home sensor.
- Development and identification of interconnect technology and packaging for the implementation of a tunable laser in a hermetically sealed box.
- Development of test routines and algorithms for testing the electrical components of a tunable laser including production line testing of all electrical components (Thermisters, TECs, stepper motor, Encoder, EEPROM) using LabWindows.
- Development of a Pt. RTD and Pt. and NiCr heaters on a Silicon optical grid with electromigration and reliability considerations for 25 years lifetime.
Jan 1997 - Jan 2000
Director of Applications
Established applications department, which included hiring and supervising eight employees. Successfully implemented reliability and lifetime stress test service for fee operation. Provided semiconductor device physics, reliability, and stress testing expertise on all customer application issues, customer driven enhancements, high temperature packaging and DUT board design, and improvements in hardware and software applications. Managed travel expenses, created annual projections for budgeting department, and managed field replacement expenses and test lab revenues.
Established Applications Department by hiring 3 applications engineers; managed 2-person field service operation and expanded it to 4 employees.
Managed all user driven Hardware and software enhancement efforts.
Reduced system field problems by overseeing implementation of changes and design corrections achieving system stability and reliability.
- Generated $300K in third year of test service operation which I started; hired test engineer to operate lab.
- Achieved highest level of customer satisfaction and recognized as industry’s top customer service provider with merger of applications and customer service departments.
Jan 1996 - Jan 1997
Responsible for full ET characterization, modeling and process definition and improvement of 0.8 micron and 0.6 micron two Poly, two metal.Flash technology in CMOS used in the GF100K series FPGA’s.Developed Basic test routines and utilized the HP4062 parametric test station for electrical characterization of the company Flash memory cell to be implemented in a gate array device.These included QBD (Infant Mortality rates), capacitance measurements, MOSFET ID/VD, ID/VG, BVDSS, Snapback, ring oscillator, programming speed and disturb measurements. Utilized the HP4145 parametric tester for characterization of break down voltages and determination of oxide integrity.Standardized test and measurement, and data analysis.
Jan 1989 - Jan 1996
Molecular Devices Inc
Responsible for the Characterization and testing of the company Silicon pH (EIS) and REDOX (MOS)sensors, Automated Instrumentation setup, LabWindows and C programming, Experimental data gathering, data analysis, and modeling.Published and co-authored many papers and made conference presentations.
- Performed experiments for the determination of the wavelength, frequency and duty cycle dependence of thephoto-capacitance of the LAPS sensor. Published paper in Wavelength dependence of the photo-response of an EIS structure.
- Designed and built a six channel low drift low noise pico-ammeter and wrote LabWindows routines to control it through a RS232 controlled 24 bit A/D board to measure the REDOX activity in enzymatic reactions.
- Built an RF bridge to conductively couple to Silicon wafers for determining the photo-conductive decay lifetime of photo-injected minority carriers. Built a 10 MHz signal generator for the RF bridge.Developed LabWindows code for data collection.
- Set up Coulometric feedback system with a multiplexed Keithley current source to supply current to 8 feedback electrodes in a REDOX chamber. Wrote C language program to control this system.
- Performed experiments for the characterization of Silicon Nitride on Silicon.Set up a Streaming potential measurement apparatus with IEEE-488 control of peripherals for characterization of Silicon Nitride, Silicon Oxide and Tantalum oxide surfaces.
- Set up a titration apparatus with RS232 control of an Orion pH meter and a Cavro dispensing pump through an interrupt driven C program that controls an in-house 12 bit A/D board (MDC50).
- Performed profilometry and Ellipsometry.
Completed first year of course work in Ph.D Physics.
Procurement & Facilities
Test & Characterization
Client Relationship Management
Research & Development
- US Patent 7,666,791 B2, Feb 23, 2010, “Systems ans Methods for Nanowire Growth and Harvesting”, Shahriar Mostarshed and Linda T. Romano.
- US patent 7,701,014 B2, Apr. 20, 2010, "Method, System, and Apparatus for Gating Configurations and Improved Contacts in Nanowire-Based Electronics Devices", Shahriar Mostarshed, Jian Chen, Francesco Lemmi, Yaoling Pan, Linda T. Romano.
- Patent Application, May 2009, "Thin Film Solar Cell Design", Shahriar Mostarshed.
- US Patent US 7,560,366 B1, Jul. 14, 2009, "Nanowire Horizontal Growth and Substrate Removal", Linda Romano and Shahriar Mostarshed.
- US patent 7,473,943 B2, Jan. 6, 2009, "Gate configuration for Nanowire Electronic Devices", Shahriar Mostarshed, Jian Chen, Francesco Lemmi, Yaoling Pan, Linda T. Romano.
- "A Novel High Efficiency Thin Film Solar Cell", Shahriar Mostarshed.
- "Silicon polymer composite PV cell", Shahriar Mostarshed and Linda Romano.
- "Methods, Systems and Apparatus for Gating configurations and improved contacts in Nanowire based Electronic Devices", PCT/US2005/037237, Shahriar Mostarshed, Jian Chen, Francesco Leon. Yaoling Pan and Linda Romano.
- "Circularly Symmetric Contact Electrodes for Randomly Oriented Nanowires", Shahriar Mostarshed, Yaoling Pan, Francesco Leon.
- "NW Growth Using a Combination of Si Precursors", Shahriar Mostarshed and Linda Romano.
- "Overlapping Gate Field Effect Transistor Nanowire devices", Shahriar Mostarshed, Yaoling Pan, Jian Chen, Linda Romano.
- "Ultra-Fine Pitch Vertical MOSFET Using Oriented Nanowires", Francesco Lemmi, Linda Romano and Shahriar Mostarshed.
- "Planar Nanowire Based Sensor Elements, Devices, Systems and Methods for Using and Making Same" Pontis, George; Stonas, Walter; Chow, Calvin; Parce, J. Wallace; Pan, Yaoling; Romano, Linda T.; Mostarshed, Shahriar.
- "Methods for Nanostructure Doping", PCT/US2006/036738, Yaoling Pan, Jian Chen, Francisco Leon, Shahriar Mostarshed, Linda Romano, Vvijendra Sahi, David Stumbo.
- US Patent 7,273,732 B2, Sept. 25, 2007, "Systems and Methods for Nanowire Growth and Harvesting", Yaoling Pan, XIangfeng Duan, Bob Dubrow, Jay Goldman, Shahriar Mostarshed, Chunming Niu, Linda Romano, Dave Stumbo.
- "Methods for Oriented Growth of Nanowires on Patterned Substrates", Yaoling Pan, Xiangfeng Duan, Robert Dubrow, Jay Goldman, Shahriar Mostarshed, Chunming Niu, Linda Romano, David Stumbo, Alice Fischer-Colbrie, Vijendra Sahi, Virginia Robbins.
- US patent 7,126,361 B1, Oct. 24, 2006, "Vertical Probe Card and Air Cooled Probe Head System", Michael Anderson, Eddie McCloud, Shahriar Mostarshed and Michael Casolo.
- US PATENT 7,511,517, Mar. 2009, "Semi automatic multiplexing system for automated wafer testing", Shahriar Mostarshed and Michael Anderson.
- US PATENT 7,576,550, Aug. 18, 2009, "Automatic Multiplexing System for Automated Wafer Probing", Shahriar Mostarshed and Michael Anderson.
Surface Chemistry Characterization
- The Zeta Potential of Silicon Nitride Thin Films, Electro analysis Chemistry - Journal #302, 1991,
- p. 269-274.
- Zeta Potential Measurements of Ta205 and Si02 Thin Films, Journal of Colloid & Interface Science, Volume 147, No.1.
- Combined Measurement of Surface Potential and Zeta Potential at Insulator/Electrolyte Interfaces, Sensors and Actuators B, 1992, p. 67-71.
Si Optical Response Investigation
- The Effects of Physical Parameters on the Response of a Light Addressable Potentiometer, Euro sensors.
- Minority Carrier Diffusion Length Effects on Light Addressable Potentiometric Sensor (LAPS) Devices, Sensors and Actuators A 32, 1992, p. 431-436.
- Investigation of Carrier Transport Through Silicon Wafers by AC Photo-current Measurements,Applied Physics Journal 75, April 15, 1994.
Spectral Response Investigation
- Measurement of Minority Carrier Lifetime Using Wavelength Dependence in EIS Structures, ECS Extended Abstracts No. 259, May 1994.
Silicon Device Characterization
- “Impact of tunnel oxide quality on Vt disturb and sort yield of high density Flash memory FPGA devices” IEDM, to be published
Product Development | Director
Technology Development, System DesignSelf-driven professional with more than 20 years of experience designing and patenting innovative systems and processes for organizations ranging from start ups to global manufacturers. Effective Project Manager and multidisciplinary Team Leader with proven success in meeting key deliverables within tight budget and time constraints. Strong hands on and interpersonal skills, management of client relations and partnership negotiations.
Technology development:Diverse technical background. Expert-level knowledge of semiconductor and solar devices as well as instruments used in characterization of such devices. Expert knowledge of Semiconductor reliability and stress testing. Developed silicon nanowire transistor devices and solar cell devices.
Business development:Aptitude for grasping market trends as well as leading development and implementation of technologies and processes to improve productivity, quality, and operating performance. Successful track record in negotiating partnerships, defining road maps, and managing client relations. Technical management: Effective combination of business, technical, and leadership qualifications, complementing creative problem-solving skills. Continuously maximize profitability by driving new technology development and diversifying/defining new products that positively affect bottom line; achieved through engineering knowledge, project conceptualization, critical data review, designing for reliability, and leading implementation.
- Technology Development
- Device development
- PV and nanotechnology development
- System Design
- Equipment design (YAG laser welder, High temp prober)
- Reliability and Stress testing
- Technical Development
- ECL process design and definition
- Instrument Design
- Research & Development
- System Development
- Cross-functional Team Leadership
- Business Development
- P&L Management
- Strategic Partnership
- Client Relationship Management
- Technical Sales
- Procurement & Facilities
Technologically oriented performer with more than 20 years’ experience developing new technologies including characterizing photovoltaic and semiconductor devices with design experience in instruments used in such test and characterization. Particularly effective directing team members in development of new product ideas including system integration and design optimization that results in enhancement of current product lines. Analytical troubleshooter with demonstrated ability to identify problems and implement solutions. Solid reputation for managing and creating positive vendor relations. Innovative thinker who creates marketing strategies that result in building profitable partnerships. Energetic and dedicated team leader fostering motivation through involvement and positive reinforcement. Have changed hats many times including jumping in to build automated process equipment to bring production line up after suffering great loss in Thailand floods.
- Going through college, worked as a construction inspector and as a painter.
- Built a one bedroom suite in the part submerged ground floor of my house in San Francisco. Moved furnace and water heater to make room for a Kitchen, living room, bedroom, one bathroom suite.
- Have tiled kitchens and bathrooms, installed new hardwood floors and restored old hardwood floors, patched up roofs, and painted interiors.
- Replaced engine and repainted my car in college.