- Designed Pentek's first Ethernet based device using custom VHDL logic & Xilinx IP cores
- Researched how to implement and design Ethernet controller according to IEEE specifications
- Closed timing setup, hold, and pulse width errors using constraints & design changes
- Debugged Logic in FPGA hardware using Xilinx chipscope in real time
- 10 Gigabit Ethernet based VHDL designed streams data in real time using IPV4 and UDP
- Created C based client program to receive data and store to drives.
- Verified zero data loss streaming at 10GigE.