Manik Jindal

Manik Jindal

B.E. (ECE), Mtech. (System on Chip)


I am a Post-Grad student at IIITB pursuing my Mtech in Electronic System Design, with specialisation in System on Chip (SoC).

My graduation in Electronics and Communication, gave me brief insight of electronic circuitry. I wanted to learn, satiate my never-ending curiosity in VLSI circuits and make the optimum use of it. This lead to my interest in Design of Integrated Circuits and Systems.

Designing circuits become challenging when one has to take into account various constraints of power, area and performance. This is where the design engineer implements his ideas.

I am looking for a challenging position in a leading and progressive VLSI design industry, offering opportunities for utilizing my skills towards the growth of the organization as well as my professional career.

Work History

Work History
Jan 2014 - Jun 2014


Bharat Sanchar Nigam Limited (BSNL)

I was involved with technical team of the company. Team was responsible for setting up and management of BTS and MSC stations.

Jun 2012 - Jul 2012

Summer Trainee

Electronics test and development centre

I was involved in the following : 

  • Testing of electronic instruments under different physical conditions viz. various temperatures, pressures etc.
  • Calibration of measuring instruments like vernier callipers, weighing balances and temperature sensors.



Master of Technology, System on Chip (3.70 till date)

International institute of information technology, Bangalore
Aug 2010 - Jun 2014

Bachelor of Engineering, Electronics and Communication (88.9%)

chandigarh college of engineering and technology, Panjab University, chandiagrh
Apr 2008 - Mar 2010

Senior Secondary School (85%)

Sri guru harkrishan model school, chandigarh
Apr 1998 - Mar 2008

High School (88.2%)

D.A.V. Public School, Chandigarh
  • Head Boy of the school.
  • Topper of the batch during session 2006-2007.


Feb 2015 - Apr 2015

Programming for Everybody (Python)


University of Michigan, by Prof. Charles Severance

Jan 2015 - Apr 2015

VLSI CAD : Logic to Layout


University of Illinois at Urbana-Champaign, by Prof. Rob Rutenbar


An Automated Layout Tool for Analog and Mixed Signal Designs (January 2015 - Present)

This is an ongoing research project. It focuses on automation of converting a layout from one process technology to another, thereby exploiting the re-usability of the layout resources accumulated from the initial process technology. Apart from this, it generates transistor level cell layout targeting use of multi-finger structures, symmetry in layout and common centroid methods.

Design of High Gain Three Stage Amplifier (January 2015 - June 2015)

Three stage amplifier with five different compensation techniques was designed. Compensation techniques included Nested Miller, Second stage bypassed compensation, Nested Miller Feed-forward Compensation and Damping Factor Control Frequency compensation. A new compensation technique was also implemented named as Feed-forward block and second stage bypassed compensation. A comparison was done among them. New implemented technique was able to drive high load capacitances in comparison to other techniques.

Optimum Energy Management System (January 2013 - June 2013)

This System defines an easy way to save energy by controlling the switching of loads in a room only on the basis of the number of persons entering the room. The project uses Infra-red  sensors to sense the persons entering and leaving the room and accordingly the control unit controls the switching of the load.



Python programming

C Programming