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Jithesh C P

Assistant Professor in Electronics Engineering

Career Summary

A master graduate in electronics engineering and technology with 7+ years of teaching in Government Engineering Colleges in the capacity of Assistant Professor and 5 years of industry experience in the field of semiconductor IC design.

  • Working as Assistant Professor in Electronics Engineering Department, Government Engineering College, Palakkad, Kerala, India since October 2017
  • Worked as Assistant Professor in Electronics Engineering Department, Government Engineering College, Kozhikode, Kerala, India during Jan 2011-Sep 2017
  • Worked as component design engineer for server/client CPUs and integrated graphics products at Intel Corporation, Bangalore, India during June 2007-July 2010
  • Worked as Design Engineer at Freescale Semiconductor, Noida, India during July 2006 - May 2007
  • Worked as Senior Engineer at Tata Elxsi Limited, Bangalore, India during July 2005 - June 2006
  • Acquired M.Tech degree in VLSI System from NIT, Tiruchirapalli in July  2005
  • Acquired B.Tech degree (Honors) in Electronics & Communication Engineering from Calicut University in 2002
  • Technical skills in software languages (C/Perl), Hardware Languages (VHDL/Verilog/ASM), Embedded Development Tools (Xilinx ISE, Mentor Graphics HEP, Keil Micorvision, IoT kits, Code Composer Studio etc), Microsoft Office tools, Linux OS platform.
  • Publications in peer reviewed international journals (2), Conference Proceedings (2) and a book (1)
  • Consistent track records in performance as faculty based on student feedback and supervisor annual reviews (score>80%)
  • Multiple recognitions from Intel Corporation for performance achievements
  • Focused, hardworking, self motivated and effective team player with excellent communication and inter-personal skills

Career Objective

Seeking a position in higher learning institutions as a faculty in engineering and technology discipline where I can utilize my expertise to excel in teaching and or administrative roles.


Work Experience

3 Oct 2017till date

Assistant Professor, Department of Electronics Engineering

Government Engineering College, Palakkad, Kerala, India

Government Engineering College, Palakkad is one among nine government engineering colleges in kerala under the department of technical education run by the Higher Education Department of Govt. of Kerala started in 1999 with five engineering departments i.e. Computer Science Engineering, Electronics and Communication Engineering, Information Technology, Mechanical Engineering and Electrical and Electronics Engineering. Department of Electronics and Communication offers four year B.Tech degree program in Electronics & Communication Engineering. For more details, please visit www.gecskp.ac.in. I am working as Assistant Professor in the department of Electronics and Communication Engineering (reporting to Head Of the Department) with responsibilities include but not limited to handle lecture hours, Staff Advisor for UG, Student Mentorship, Assist department and or institute level administrative activities.

Responsibilities:

  • Handle theory and practical courses with workload of 16 hours/week (full-time faculty) for the Bachelor of Technology in Electronics Engineering undergraduate students in every semester (courses handled: basics of electronics engineering, VLSI, micro project, micro-controller laboratory).

  • Staff advisor for a running batch to maintain the academic student records and give guidance on their academic and non-academic matters.

  • University Examiner for theory camp valuation and conduct of practical examination

  • institutional co-ordinator for managing the activities related to All India Council for Technical Education approval process. Institutional co-ordinator for participating in ministry of education India initiatives like higher education ranking/survey.

Keywords: Lecturer, technology enabled learning, course plan, student mentor,  university examiner, staff advisor, institutional co-ordinator

Accomplishments:

  • Successfully completed National Institutional Ranking Framework (NIRF-2018) survey activities related data collection and web portal entry on behalf of the institution

  • Spearheaded faculty and programmer team to accomplish application procedure for the All India Council of Technical Education (AICTE) extension of approval for the institution in Dec 2017-Jan 2018

  • Proposed a technology enabled learning initiative i.e. Android Phone based circuit design application to improve teaching-learning environment for the micro project course
13 Jan 201127 Sep 2017

Assistant Professor, Department of Electronics Engineering

Government Engineering College, Kozhikode, Kerala, India

Government Engineering College, Kozhikode is one among nine government engineering colleges in kerala under the department of technical education run by the Higher Education Department of Govt. of Kerala started in 1999 with four departments i.e. Civil Engineering, Mechanical Engineering, Electronics Engineering and Chemical Engineering. Department of Electronics Engineering offers two B.Tech programs in Applied Electronics & Instrumentation Engineering and Electronics & Communication Engineering (started in 2012) and one M.Tech program in signal processing. For more details, please visit www.geckkd.ac.in. I worked as Assistant Professor in the department of Electronics (reporting to Head Of the Department) with responsibilities include but not limited to handle lecture hours for UG/PG semesters, Staff Advisor for UG batch, student mentorship, Assist department and or institution level administrative activities.

Responsibilities:

  • Handle theory and practical courses with a workload of 16 hours/week (full-time faculty) for the Bachelor of Technology/Master of Technology in Electronics Engineering courses in every semester (courses handled: digital electronics, digital system design, CMOS circuit design, VLSI, computer organization, embedded systems, microprocessor laboratory, VLSI laboratory, Analog communication Laboratory)

  • Department co-ordinator for conducting  internal test, Practical Examination, organizing department events like conferences and faculty trainings. Prepare reports of various academic activities from time to time as requested by higher authorities.

  • Staff advisor for the UG batch to maintain the academic student records and mentor on their academic and non-academic matters.

  • University Examiner for valuation of answer scripts, practical examination and or thesis/viva-voce/project evaluation

  • Faculty-in-charge for microprocessor lab responsible for managing equipment purchases for the academic lab by utilizing state and central government funds

  • IPR cell institute level co-ordinator to act as interface to Patent Information Cell, Kerala and the institute to manage IPR related activities i.e. publish news letter and update in college notice board, communicate workshop, seminars conducted related to IPR to the college faculty and students to create awareness on intellectual property rights

Keywords: Lecturer, curriculum design, accreditation, student mentor, project guide, university examiner, staff advisor, academic-coordinator,purchase

Accomplishments:

  • Successfully procured technology enabled learning resources i.e. Enabled final year students with latest IoT and VLSI tools and kits to gain contemporary tech skills.
  • Played a key role as a department convener in getting the national level accreditation NBA and ISO certification process during 2016-17.

  • Board of studies Member of the Calicut University Engineering (PG) board since 2016.

  • Contributed to curriculum revisions of 2014 and 2015 scheme and syllabus of Electronics Engineering
  • Guided 7 Master Thesis Projects with 3 publications in peer reviewed journal/conference proceedings.

  • Organized the National Conference on Emerging Technologies (NET) - Signal Processing in the year 2014 & 2016 as a department co-ordinator

  • Successfully co-ordinated THREE short term training programs related to Digital Design, Power Electronics, E-Waste management during the year 2012-2013.

  • Prepared Proposal and executed procurement of embedded boards and software packages amounts to INR.9 lac for the microprocessor lab through AICTE fund in the year 2011-12.

  • Prepared proposal and completed procurement of equipments for an amount of INR.5 lac through TEQIP Phase-II fund in 2012-13.

    11 Jun 200730 Jul 2010

    Component Design Engineer

    Intel Technology India Private Limited, Bangalore, India

    Intel Corporation is a leading semiconductor MNC for computer hardware and consumer electronic products, HQ in California US. For more details, please visit www.intel.com. I was part of Intel Architecture Group at Intel Bangalore design centre as a design automation engineer (reporting to Engineering Manager) whose role is to develop, integrate and manage the pre-silicon design validation software flows and tools for various server-class (Intel Xeon) CPU products as well as integrated graphics for future generation client CPU products

    Responsibilities:

    • Evaluate, integrate and manage front end pre-silicon design environment and EDA tools for Intel Xeon Server CPU design/Client CPU and graphics projects
    • Serve as front end design automation/CAD support engineer for hundred member CPU design team at site and few cross site teams in US
    • Collaborate with cross site functional teams for design methodology and or EDA tool improvement initiatives
    • Co-ordinate and manage compute infrastructure for CPU design team at site
    • Collaborate with Electronic Design Automation vendors for third party EDA solution evaluation and training

    Keywords: Front-end RTL design automation, CAD, EDA Tools, Pre-silicon validation methodologies, Intel Xeon Server CPU, Intel Integrated Graphics, X86 architecture, design infrastructure and compute, EDA license management, Version control software management, RCS, Bitkeeper, compilers, simulators, software debugger, profilers, performance optimization, VCS, Specman, Verdi, silotti, Debussy, Verilog, System Verilog, Assertions, Specman e, C++, Modelsim, 0-In, Perl, UNIX,LINUX, gdb, csh, shell scripting

    Accomplishments:

    • Excellent track record in managing design automation environment for the design activities of Intel’s 6-core, 8-core and 10-core Xeon Server products acknowledged by multiple individual recognitions
    • Received site level recognition (Intel Honors) for cutting down project infrastructure cost by 3M USD by deploying cost efficient compute solutions during Intel’s 10-core Xeon design development
    • Deployed 1.2x logic simulation speed-up for Intel Xeon design project and 3X speed up for Client Graphics project team by collaborating with EDA Vendor Synopsys Inc.
    • Successfully proto-typed VCS (Synopsys Inc. logic simulator) multi-core technology to benefit Intel’s future CPU and client graphics simulation methodologies
    • Architected novel solution named ‘XpressDebug’ for faster pre-silicon design validation convergence and published as a paper in Intel design technology conference (DTTC) in 2008
    31 Jul 200625 May 2007

    Design Engineer

    Freescale Semiconductor India Private Limited, Noida, India

    Freescale semiconductor MNC (now acquired by NXP semiconductor) is offshoot of Motorola Inc. hardware group having HQ at Austin, US and focus on providing semiconductor solutions in the areas of mobile, wireless networking and automotives. For more details, please visit website: www.freescale.com. I was part of wireless group at noida design centre as a design engineer (reports to design manager) whose role is to validate System On Chip architecture (IP) for next generation wireless mobile products  

    Responsibilities:

    • Validate USB2.0 IP Physical Layer at module and system level for SoC wireless mobile architectures
    • Own and execute specific software IP test suite in a five member team
    • Document test plan and create protocol test suit for USB2.0 PHY IP software verification and review with project team
    • Find software IP design bugs and close with IP owner in timely fashion

    Keywords: VCS, Debussy, NCSIM, Clear Case, IP Standalone Verification, High Speed ULPI & UTMI, USB 2.0 PHY, Functional IP verification, RTL design, Verilog, Vera, USB Link Layer, Synopsys Device BFM, Core Interface, C, USB Driver, RTL gate level simulation

    Accomplishments: 

    • Worked on System on Chip level (SoC) logic and gate level verification of USB2.0 PHY IP for two product tape-outs
    25 Jul 200523 Jun 2006

    Senior Engineer

    Tata Elxsi Limited, Bangalore, India

    Tata Elxsi is part of Tata Group of Companies in India providing customized design solutions in the field of consumer electronics, entertainment, media and telecom across globe. For more details, please visit website: www.tataelxsi.com. I was part of Canon Inc. Offshore Design Centre team under the supervision of Senior Design Manager, Hardware&Systems group at Bangalore 

    Responsibilities:

    • Digital IP modelling engineer for serial interface protocols USB2.0/IEEE1394 (fire-wire)
    • Understand protocol specification, software modelling and validate through logic simulation
    • Document and archive the IP and signoff with respective IP integration leads

    Keywords: Modelsim, CVS, Digital Modeling, 1394 PHY, TI 1394 Serial Bus PHY TSB41AB1, Verilog, USB2.0 PHY, ULPI, UTMI Macro Cell, Functional Verification 

    Accomplishments:

    • Delivered Physical layer IP behavioral models for serial interface protocols USB2.0 and IEEE1394 for the project funded by client Canon Inc. Japan for Tata Elxsi Bangalore 

    Education

    1 Aug 200323 Jul 2005

    M.Tech

    National Institute of Technology, Thiruchirapalli, Tamil Nadu, India
    • Specialisation: VLSI System
    • Score: Secured first class with a score of 8.32 CGPA on 10 point scale
    • Major courses: Digital VLSI, Analog VLSI, HDL Programming, EDA tools, Designing with ASIC and FPGA, VLSI testing, Low Power VLSI, DSP architectures for VLSI

    Technical Skills

    software langauages: C/Perl

    Verification test case development using C for USB IP at Freescale semiconductor. Perl based scripting expertise for tool and database management automation at Intel Corporation. C based simulation environment exposoure for VCS/Specman PLI interface at Intel Corporation

    OS platforms: LINUX/Windows

    LINUX: Multiple project experience through pre-silicon validation and database management softwares on LINUX (Redhat and SUSE) platforms. 

    Windows: Expertise on Microsoft Office Tools used for documentation work related to teaching and administrative roles.

    HDL/HVLs:VHDL/Verilog/System Verilog

    VHDL teaching experience at academic level. Verilog HDL modeling experience for serial interface protocols USB/IEEE1394. Verilog RTL verification experience for USB2.0 PHY at Freescale semiconductor. System Verilog use model experience in CPU and graphics design environment as a design automation engineer at Intel

    Embedded tool suites

    IDE: Xilinx ISE, Mentor Graphics HEP, Synopsys VCS, Novas Verdi, Cadence Specman, Keil microvision, proteus simulation software, code composer studio

    FPGA kits: Xilinx Spartan/Virtex boards

    Embedded Kits: Intel Galileo/Raspberry Pi/Arduino kits/ARM

    Area of Expertise

    • System design with HDL, CMOS VLSI, Embedded Systems, Signal Processing structures for VLSI, Computer Organization, Electronic Design Automation Tools

    Publications

    • Published a paper on “Hardware implementation of modified AES algorithm for secure images” in International Journal of Engineering Research & Technology (IJERT) ISSN:2278-0181 Vol.6 Issue 09 July 2017
    • Published a book titled "FPGA based implementation of self timed FIR filter - Methodology, Modeling, Implementation" Scholar's Press, Germany in 2016, ISBN 978-3-659-84270-2
    • Published a paper on “An Efficient Decision Tree Based Denoising Algorithm for Removal of Impulse Noise” in conference proceedings of 3rd National Conference Systems, Energy and Environment 2015 (NCSEE'15) page nos.261-265, ISBN 978-93-85477-10-2
    • Published a paper on “A High Performance Architecture for Elimination of Impulse Noise in Images” in International Journal of Engineering Research & Technology (IJERT) ISSN:2278-0181 Vol.4 Issue 07 July 2015
    • Published a paper on “Xpress Debug: A Methodology of Productive Pre-silicon Debug” in Intel Design and Test Technology Conference (DTTC) in 2008”

    Career Development

    29 August 20162 September 2016

    Digital Signal Processing and Image Processing using SciLab

    NITTTR Chandigarh

    One week AICTE sponsored training on open source tool SciLab for Digital Signal Processing

    4 January 20168 January 2016

    Simulation Tools in Electronics and Digital Systems

    Indian Institute of Technology, Bombay

    Five Days Training Program on Open Source Tools for Electronic Circuit Design

    24 November 201427 November 2014

    Formulation of Research and Development initiatives for Scientist and Technologist

    Engineering Staff College of India, Hyderabad

    Four Days Training Program on Research initiatives and to create awareness on Research funding sources

    3 January 20144 January 2014

    Workshop on Intellectual Property Rights and Patent Drafting

    College of Engineering, Trivandrum

    Two day hands on training on IPR and Patent drafting

    16 January 201218 January 2012

    Development of Life Skills for Faculty of Engineering Colleges

    Institute of Management in Government, Calicut

    Three Days induction training for the faculty and staff in government Technical institutions

    Awards and Honors

    • Certificate of appreciation for co-ordinating National Conference on Emerging Technologies (NET) in 2014 and 2016 from Government Engineering College, Kozhikode
    • Multiple recognitions from Intel Corporation for performance achievements
    • Honors degree in Electronics & Communication Engineering Technology from Calicut University in 2002.
    • Certificate of Merit for securing 1st Rank in class during B.Tech course.

    Personal Info

    • Date Of Birth:12th March 1980
    • Gender: Male
    • Marital Status: Married
    • Nationality:  Indian
    • State of domicile: Kerala
    • Languages Known: English, Hindi
    • Passport No: J3859140(india)
    • Driving License No: M/3028/2000 (India)

    Portfolio-Academic Certifications

    Engineering and Technology certifications: B.Tech and M.Tech degree certificates

    Portfolio-Professional Certifications

    Academic and Industry experience certificates

    Portfolio-Publications

    Portfolio-Career Development

    Short Term Training Certifications

    Portfolio-Recognitions

    Recognition awards and honors received during academic and professional career

    Portfolio-student feedback

    Student feedback documents (recent) in the capacity of Assistant Professor in Engineering and Technology discipline

    Portfolio-Lecture Videos

    Class room teaching videos