• Darmstadt, Germany
Vishwanath Prakash Hiremath

Vishwanath Prakash Hiremath

Application for Internship in Integrated Circuit Design

Objective

To  pursue excellence  and growth in  the field  I work, contribute  to the best of my skills and knowledge, to   work productively for  the  organisation with  commitment and  keenly look forward to meet challenges in a dynamic environment.

Work History

Work History

Graduate Research Assistant : IC Layout Designer

Jun 2015 - Present
Integrierte Elektronische Systeme, TU Darmstadt (Germany)

Design of a voltage controlled  current source (VCCS)  for fiber-to-the-x (FTTx) ASIC. It  comprises  of  current mirrored  2  differential  amplifiers  and  voltage  reference. The  design is implemented with optimized floor planning and  placement with high current density metal layers and  vias to  minimize the area and  increase efficiency. Layout  techniques  like  common-centroid,  inter-digitization  has  been  used  and  DRC,  LVS  for verification. The  SG13S  130nm  BiCMOS   technology  is  used  in  Cadence  Virtuoso  Layout  Design  Suite. Currently, post-layout simulations are being carried out.

Graduate Research Assistant: Analog IC Designer

Nov 2014 - Jun 2015
Integrierte Elektronische Systeme, TU Darmstadt (Germany)

The task was to design a RF gain tilt equalizer to provide compensation for the gain roll-off of the broadband amplifiers and  to  match  frequency  response to the inverse loss profile of target channel. It consists of a T-attenuator realized by MOS transistors, bypass capacitor for frequency dependence and passive impedance matching circuit. It has been designed using SG13S 130nm BiCMOS technology in Cadence Virtuoso  Analog Design Environment. The integrated circuit was simulated for desired slope over frequency range, gain, step size, output referred third intercept point, 1-dB compression point, insertion and return loss.

Systems Engineer

Jun 2011 - Aug 2013
Infosys Ltd, Bangalore (India)

C#  program  development  in Microsoft  Visual  Studio with Microsoft  Biztalk template. Unit  and  Integration testing with package deployment in client server.

Education

Education

Master of Science

Sep 2013 - Present
Technical University of Darmstadt, Germany

Information and Communication Engineering (Specialization in Integrated Electronics)                             CGPA : 2.2 

Bachelor of Engineering

Sep 2007 - Jun 2011
Visveswaraya Technological University, India

Electronics and Communication Engineering

Grade (in %) : 75.6/100 (First Class with Distinction)

Academic Projects

  • "Design of 3-bit Resistor string Digital-to-Analog converter".                                                                                 The DAC architecture has been designed with two stage op-amp, analog  switch multiplexer, control  logic circuit and R-2R ladder in Cadence  Virtuoso  Custom  IC Design tools using  0.13um mixed mode  and  RF CMOS   process  (umc130mmrf)   technology   library. The  analog / mixed  signal  layout  design  included optimized floor planning , techniques like common-centroid  method accompanied  by DRC, LVS and QRC. The post-schematic and post-layout simulations in Cadence Spectre were also carried out.                                                                                                                                                                                     
  • "Design of Thumb Processor Architecture with 3 Pipeline stages".                                                                       The project task was to model a multi-pipeline processor with the ARM THUMB instruction set to execute given  C  programs  in  ModelSim  6.5  using  System  Verilog.                                                                                                                                                                                  
  • "Solar Energy Harvester using Mixed Signal Processor MSP430 in wireless sensor networks".                    The project includes analog circuit board design of power management block with charge pumps, voltage  doublers  and  battery management block  with  current  limited  charging  and voltage  monitoring circuit  with  simulation  in  5Spice.  Code    development  in  IAR   embedded   work  bench  and  EZ430 - RF2500  development  kit  used  for  remote temperature  sensing  and  monitoring.

Workshops

  • Training  on  MSP430 F2274   jointly  conducted  by  Texas  Instruments, India  and  B.V.B  College  of Engineering and Technology, Hubli (India).                                                                                                                                                                                 
  • Training on Low  Power  Embedded  Systems  jointly conducted by Texas Instruments, India and M S Ramaiah Institute of Technology, Bangalore (India).

Professional Skills

  • Design/Development tools: Cadence Virtuoso (Custom IC/ Analog), Spice, ModelSim, Matlab.
  • Micro-controller/Development kit: MSP430F2274, EZ430-RF2500, IAR Embedded Workbench.
  • Programming Languages: C#, VHDL, Verilog.
  • Operating systems: Windows (XP/Vista/8.1), Linux (Red hat/Ubuntu)
  • Enterprise Solutions: Microsoft Visual Studio, Microsoft Office tools.

Personal Skills

  • Communication Skills :
    Languages Listening Reading Writing Speaking
    English Advanced Advanced Advanced Advanced
    German A2/A1 A2/A1 A2/A1  A2/A1
     
  •  Good interpersonal skills and etiquette gained through professional skills development programs and workshops conducted by Infosys Ltd, Bangalore (India).                                                                                                                                                             
  • Good organisational  and management  skills  gained  as  student placement coordinator at job fairs in Dayanada Sagar College of Engineering, Bangalore (India).