Sirisha Kolli


Over 3 years experience working in semiconductor wafer fabrication firm, STMicroelectronics, as a Process Control Engineer. B.E in Electrical Engineering from National University of Singapore; M.S in Design engineering from Northwestern University, Illinois, USA. Interested to work as a design engineer in the new product development industry/ semiconductor industry.

Work History

Work History
May 2005 - Jul 2008

Process Control Engineer

 Responsible for achieving improvement of the Defectivity index (Electrical yield/ Defect density) of the fabrication unit by establishing and maintaining control on production wafers, equipments and the cleanroom environment. o Continuously engaged in improvement activities for wafer electrical yield through team coordination, systematic problem solving, statistical analysis, procedural improvement, documentation and training o Ownership of Defectivity metrology tools like KLA Tencor 7700 Darkfield inspection tool & Surfscan 6420; hands on experience in recipe creation, tool set-up and calibration o Compiled an engineer’s handbook covering the major concepts of defectivity and its control in cleanroom, to be used as training material for new engineers o Demonstrated quick grasp of each area and was given responsibility of handling multiple production lines (5” and 6” wafers), involving numerous device families (BJT, CMOS, MOS, IPAD) in the space of one and half years.  Promoted with additional responsibility to use knowledge in fabrication processes as well as overall fab system in dealing with different failure modes leading to wafers scrapped in the production line. o Responsible to improve the wafer fabyield (loss/output) index of the 5” wafer production line involving 3 different fabs and 10 different technological product families running hundreds of different devices. o Lead and drive teams of process, equipment and device engineers and resolve issues of varying origins and symptoms – from system robustness and people management to device functional test failures due to process and equipment problems o Used quality control Six Sigma tools like Design of Experiments, Failure Mode and Effects Analysis, Statistical Process Control, 8D and Pareto charts to prevent and troubleshoot problems with process, device and equipment.
Aug 2004 - Jan 2005

System Analyst

 Responsible for ensuring smooth performance of one of the crucial areas, Batch, in Pegasus - Kenan/BP based largest Telecommunications billing system in Singapore built for government based Singapore Telecommunications (SingTel)  Undertook the pressing task of revising the entire schedule for about 100 problematic jobs generating important financial reports for users. o Designed templates for distribution of the jobs on a daily, weekly and monthly basis keeping in view of all the affecting constraints to ensure minimum failure and delay of reports – an improvement on the then existing scenario.  Supervised the User Acceptance Testing for the upgrade of the application. Successfully planned and liaised with developers and testers to get the testing of scripts done as per schedule. .


2008 - 2009


Northwestern University
2000 - 2004


National University of Singapore